HD64F7047F50 Datasheet, PDF (750/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Item
Page Revisions (See Manual for Details)
Figure 12.15 Sample SCI 369
Initialization Flowchart
No
1-bit interval elapsed?
13.3.2 A/D Control/Status 383
Registers 0, 1 (ADCSR_0,
ADCSR_1)
Yes
Set PFC of the external pin used
[4]
SCK, TxD, RxD
Set RIE, TIE, and TEIE bits
Set TE and RE bits in SCR to 1
[5]
<Transfer start>
Description [4] deleted.
Initial
Bit Bit Name Value R/W Description
7 ADF
0
R/(W)* A/D End Flag
A status flag that indicates the end of A/D
conversion.
[Setting conditions]
• When A/D conversion ends in single
mode
• When A/D conversion ends on all
specified channels in scan mode
[Clearing conditions]
• When 0 is written after reading ADF = 1
• When the DTC is activated by an ADI
interrupt and ADDR is read with the
DISEL bit in DTMR of DTC = 0
14.2.2 Compare Match 399
Timer Control/Status
Register_0 and 1
(CMCSR_0, CMCSR_1)
Initial
Bit Bit Name Value R/W Description
7 CMF
0
R/(W)* Compare Match Flag
This flag indicates whether or not the
CMCNT and CMCOR values have matched.
0: CMCNT and CMCOR values have not
matched
1: CMCNT and CMCOR values have
matched
[Clearing conditions]
• Write 0 to CMF after reading 1 from it
• When the DTC is activated by an CMI
interrupt and data is transferred with the
DISEL bit in DTMR of DTC = 0
Rev. 2.00, 09/04, page 708 of 720