HD64F3670 Datasheet, PDF (68/323 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

3.2.2 Interrupt Edge Select Register 2 (IEGR2)
IEGR2 selects the direction of an edge that generates interrupt requests of the pins $'75* and
:.3 to :.3.
Bit Bit Name Initial Value R/W Description
7
1

Reserved
6
1

These bits are always read as 1.
5 WPEG5 0
R/W WKP5 Edge Select
0: Falling edge of :.3 ($'75*) pin input is detected
1: Rising edge of :.3 ($'75*) pin input is detected
4 WPEG4 0
R/W WKP4 Edge Select
0: Falling edge of :.3 pin input is detected
1: Rising edge of :.3 pin input is detected
3 WPEG3 0
R/W WKP3 Edge Select
0: Falling edge of :.3 pin input is detected
1: Rising edge of :.3 pin input is detected
2 WPEG2 0
R/W WKP2 Edge Select
0: Falling edge of :.3 pin input is detected
1: Rising edge of :.3 pin input is detected
1 WPEG1 0
R/W WKP1Edge Select
0: Falling edge of :.3 pin input is detected
1: Rising edge of :.3 pin input is detected
0 WPEG0 0
R/W WKP0 Edge Select
0: Falling edge of :.3 pin input is detected
1: Rising edge of :.3 pin input is detected
Rev. 2.0, 03/02, page 44 of 298