HD64F3670 Datasheet, PDF (306/323 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Internal data bus
DEC
A/D converter
CH3 to CH0
V_IN
Figure B.16 Port B Block Diagram (PB3 to PB0)
B.2 Port States in Each Operating State
Port
Reset
Active
Sleep
P17 to P14, High impedance
P12 to P10
Functioning Retained
P22 to P20 High impedance Functioning Retained
P57 to P50 High impedance Functioning Retained
P76 to P74 High impedance Functioning Retained
P84 to P80 High impedance Functioning Retained
PB3 to PB0 High impedance
High
High
impedance impedance
Note: * High level output when the pull-up MOS is in on state.
Subsleep
Retained
Retained
Retained
Retained
Retained
Retained
Standby
High impedance*
High impedance
High impedance*
High impedance
High impedance
High impedance
Rev. 2.0, 03/02, page 282 of 298