HD64F3670 Datasheet, PDF (280/323 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Table A.3 Number of Cycles in Each Instruction
Execution Status
(Instruction Cycle)
On-Chip Memory
Access Location
On-Chip Peripheral Module
Instruction fetch
S_I
2
—
Branch address read S_J
Stack operation
S_K
Byte data access
S_L
2 or 3*
Word data access
S_M
—
Internal operation
S_N
1
Note: * Depends on which on-chip peripheral module is accessed. See section 16.1, Register
Addresses.
Rev. 2.0, 03/02, page 256 of 298