HD64F3670 Datasheet, PDF (161/323 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

TCNT value
GRA
H'0000
CST bit
IMFA
Flag cleared
by software
Time
Figure 11.3 Periodic Counter Operation
By setting a general register as an output compare register, compare match A, B, C, or D can
cause the output at the FTIOA, FTIOB, FTIOC, or FTIOD pin to output 0, output 1, or toggle.
Figure 11.4 shows an example of 0 and 1 output when TCNT operates as a free-running counter, 1
output is selected for compare match A, and 0 output is selected for compare match B. When
signal is already at the selected output level, the signal level does not change at compare match.
TCNT value
H'FFFF
GRA
GRB
H'0000
FTIOA
FTIOB
No change
Time
No change
No change
No change
Figure 11.4 0 and 1 Output Example (TOA = 0, TOB = 1)
Figure 11.5 shows an example of toggle output when TCNT operates as a free-running counter,
and toggle output is selected for both compare match A and B.
Rev. 2.0, 03/02, page 137 of 298