HD64F3670 Datasheet, PDF (153/323 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

11.3.1 Timer Mode Register W (TMRW)
TMRW selects the general register functions and the timer output mode.
Bit Bit Name Initial Value R/W
7 CTS
0
R/W
6
1

5 BUFEB 0
R/W
4 BUFEA 0
R/W
3
1

2 PWMD 0
R/W
1 PWMC 0
R/W
0 PWMB 0
R/W
Description
Counter Start
The counter operation is halted when this bit is 0, while it
can be performed when this bit is 1.
Reserved
This bit is always read as 1.
Buffer Operation B
Selects the GRD function.
0: GRD operates as an input capture/output compare
register
1: GRD operates as the buffer register for GRB
Buffer Operation A
Selects the GRC function.
0: GRC operates as an input capture/output compare
register
1: GRC operates as the buffer register for GRA
Reserved
This bit is always read as 1.
PWM Mode D
Selects the output mode of the FTIOD pin.
0: FTIOD operates normally (output compare output)
1: PWM output
PWM Mode C
Selects the output mode of the FTIOC pin.
0: FTIOC operates normally (output compare output)
1: PWM output
PWM Mode B
Selects the output mode of the FTIOB pin.
0: FTIOB operates normally (output compare output)
1: PWM output
11.3.2 Timer Control Register W (TCRW)
TCRW selects the timer counter clock source, selects a clearing condition, and specifies the timer
output levels.
Rev. 2.0, 03/02, page 129 of 298