HD64F3670 Datasheet, PDF (316/323 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Item
10.3.5 Timer Control
Register V1 (TCRV1)
11.3.2 Timer Control
Register W (TCRW)
Page Revisions (See Manual for Details)
117
Bit Bit Name Description
2
TRGE
TCNTV starts counting up by the input
of the edge which is selected by TVEG1
and TVEG0.
0: Disables starting counting-up TCNTV
by the input of the TRGV pin and halting
counting-up TCNTV when TCNTV is
cleared by a compare match.
1: Enables starting counting-up TCNTV
by the input of the TRGV pin and halting
counting-up TCNTV when TCNTV is
cleared by a compare match.
Rev.
2.0
130 Description amended
2.0
TCRW selects the timer counter clock source, selects
a clearing condition, and specifies the timer output
levels.
Bit Bit Name Initial Value R/W Description
3 TOD
0
R/W Timer Output Level Setting D
0: Output value is 0*
1: Output value is 1*
2 TOC
0
R/W Timer Output Level Setting C
0: Output value is 0*
1: Output value is 1*
1 TOB
0
R/W Timer Output Level Setting B
0: Output value is 0*
1: Output value is 1*
0 TOA
0
R/W Timer Output Level Setting A
0: Output value is 0*
1: Output value is 1*
Note: * The change of the setting is immediately reflected in the
output value.
Rev. 2.0, 03/02, page 292 of 298