PIC18F26K80-I Datasheet, PDF (97/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
B4D5
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4D4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4D3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4D2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4D1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4D0
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4DLC
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -xxx xxxx
-uuu uuuu
-uuu uuuu
B4EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx x-xx
uuuu u-uu
uuuu u-uu
B4SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
CANCON_RO6 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
CANSTAT_RO6 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
B3D7
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D6
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D5
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3D0
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3DLC
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -xxx xxxx
-uuu uuuu
-uuu uuuu
B3EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx x-xx
uuuu u-uu
uuuu u-uu
B3SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B3CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
CANCON_RO7 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
B2D7
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B2D6
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B2D5
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B2D4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B2D3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B2D2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
2:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
4: See Table 5-3 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.
 2010-2012 Microchip Technology Inc.
DS39977F-page 97