PIC18F26K80-I Datasheet, PDF (165/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 10-17: IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4
R/W-1
R/W-1
R/W-1
R/W-1
U-0
TMR4IP
EEIP
CMP2IP
CMP1IP
—
bit 7
R/W-1
CCP5IP
R/W-1
CCP4IP
R/W-1
CCP3IP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR4IP: TMR4 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
bit 6
EEIP: EE Interrupt Priority bit
1 = High priority
0 = Low priority
bit 5
CMP2IP: CMP2 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 4
CMP1IP: CMP1 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 3
Unimplemented: Read as ‘0’
bit 2
CCP5IP: CCP5 Interrupt Priority bit
1 = High priority
0 = Low priority
bit 1
CCP4IP: CCP4 Interrupt Priority bit
1 = High priority
0 = Low priority
bit
CCP3IP: CCP3 Interrupt Priority bits
1 = High priority
0 = Low priority
 2010-2012 Microchip Technology Inc.
DS39977F-page 165