English
Language : 

PIC18F26K80-I Datasheet, PDF (154/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology
PIC18F66K80 FAMILY
REGISTER 10-6: PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
U-0
—
bit 7
U-0
R-0
R-0
R/W-0
R/W-0
R/W-0
—
RC2IF
TX2IF
CTMUIF
CCP2IF
CCP1IF
U-0
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
RC2IF: EUSARTx Receive Interrupt Flag bit
1 = The EUSARTx receive buffer, RCREG2, is full (cleared when RCREG2 is read)
0 = The EUSARTx receive buffer is empty
TX2IF: EUSARTx Transmit Interrupt Flag bit
1 = The EUSARTx transmit buffer, TXREG2, is empty (cleared when TXREG2 is written)
0 = The EUSARTx transmit buffer is full
CTMUIF: CTMU Interrupt Flag bit
1 = CTMU interrupt occurred (must be cleared in software)
0 = No CTMU interrupt occurred
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1 = A TMR1/TMR3 register capture occurred (must be cleared in software)
0 = No TMR1/TMR3 register capture occurred
Compare mode:
1 = A TMR1/TMR3 register compare match occurred (must be cleared in software)
0 = No TMR1/TMR3 register compare match occurred
PWM mode:
Unused in this mode.
CCP1IF: ECCP1 Interrupt Flag bit
Capture mode:
1 = A TMR1/TMR3 register capture occurred (must be cleared in software)
0 = No TMR1/TMR3 register capture occurred
Compare mode:
1 = A TMR1/TMR3 register compare match occurred (must be cleared in software)
0 = No TMR1/TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Unimplemented: Read as ‘0’
DS39977F-page 154
 2010-2012 Microchip Technology Inc.