PIC18F26K80-I Datasheet, PDF (564/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
FIGURE 31-5:
OSC1
CLKO AND I/O TIMING
Q4
Q1
10
CLKO
13
14
I/O pin
(Input)
17
I/O pin
(Output)
Old Value
Note:
20, 21
Refer to Figure 31-3 for load conditions.
Q2
Q3
11
19
18
12
16
15
New Value
TABLE 31-9: CLKO AND I/O TIMING REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Typ
Max Units Conditions
10
TOSH2CKL OSC1  to CLKO 
—
75
200
11
TOSH2CKH OSC1  to CLKO 
—
75
200
12
TCKR
CLKO Rise Time
—
15
30
13
TCKF
CLKO Fall Time
—
15
30
14
TCKL2IOV CLKO  to Port Out Valid
—
— 0.5 TCY + 20
15
TIOV2CKH Port In Valid before CLKO 
0.25 TCY + 25 —
—
16
TCKH2IOI Port In Hold after CLKO 
0
—
—
17
TOSH2IOV OSC1  (Q1 cycle) to Port Out Valid
—
50
150
18
TOSH2IOI OSC1  (Q2 cycle) to Port Input Invalid
100
—
—
(I/O in hold time)
19
TIOV2OSH Port Input Valid to OSC1 
(I/O in setup time)
0
—
—
20
TIOR
Port Output Rise Time
—
10
25
21
TIOF
Port Output Fall Time
—
10
25
22† TINP
INTx pin High or Low Time
20
—
—
23† TRBP
RB<7:4> Change INTx High or Low
Time
TCY
—
—
† These parameters are asynchronous events not related to any internal clock edges.
Note 1: Measurements are taken in EC mode, where CLKO output is 4 x TOSC.
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns (Note 1)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS39977F-page 564
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