PIC18F26K80-I Datasheet, PDF (93/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
PMD1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
PMD2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 ---- 0000
---- 0000
---- uuuu
PADCFG1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 ---0
0000 ---0
uuuu ---u
CTMUCONH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0-00 0000
0-00 0000
u-uu uuuu
CTMUCONL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
CTMUICON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
CCPR2H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCPR2L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCP2CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 0000
--00 0000
--uu uuuu
CCPR3H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCPR3L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCP3CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 0000
--00 0000
--uu uuuu
CCPR4H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCPR4L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCP4CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 0000
--00 0000
--uu uuuu
CCPR5H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCPR5L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
xxxx xxxx
uuuu uuuu
CCP5CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 0000
--00 0000
--uu uuuu
PSPCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 ----
0000 ----
uuuu ----
MDCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0010 0--0
0010 0--0
uuuu u--u
MDSRC
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0--- xxxx
0--- xxxx
u--- uuuu
MDCARH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0xx- xxxx
0xx- xxxx
uuu- uuuu
MDCARL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0xx- xxxx
0xx- xxxx
uuu- uuuu
CANCON_RO0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
CANSTAT_RO0 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
RXB1D7
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D6
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D5
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1D0
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXB1DLC
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
xxxx xxxx
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
2:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
4: See Table 5-3 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.
 2010-2012 Microchip Technology Inc.
DS39977F-page 93