PIC18F26K80-I Datasheet, PDF (178/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 11-3: PORTB FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O I/O Type
Description
RB0/AN10/C1INA
RB0
FLT0/INT0
0
O
DIG LATB<0> data output.
1
I
ST PORTB<0> data input; weak pull-up when RBPU bit is cleared.
AN10
1
I
ANA A/D Input Channel 10 and Comparator C1+ input. Default input
configuration on POR.
C1INA⁽¹⁾
1
I
ANA Comparator 1 Input A.
FLT0
x
I
ST Enhanced PWM Fault input for ECCPx.
INT0
1
I
ST External Interrupt 0 input.
RB1/AN8/C1INB/
RB1
P1B/CTDIN/INT1
0
O
DIG LATB<1> data output.
1
I
ST PORTB<1> data input; weak pull-up when RBPU bit is cleared.
AN8
1
I
ANA A/D Input Channel 8 and Comparator C2+ input. Default input
configuration on POR; not affected by analog output.
C1INB⁽¹⁾
1
I
ANA Comparator 1 Input B.
P1B⁽¹⁾
0
O
DIG ECCP1 PWM Output B. May be configured for tri-state during
Enhanced PWM shutdown events.
CTDIN
1
I
ST CTMU pulse delay input.
INT1
1
I
ST External Interrupt 1 input.
RB2/CANTX/C1OUT/
RB2
P1C/CTED1/INT2
0
O
DIG LATB<2> data output.
1
I
ST PORTB<2> data input; weak pull-up when RBPU bit is cleared.
CANTX⁽²⁾
0
O
DIG CAN bus TX.
C1OUT⁽¹⁾
0
O
DIG Comparator 1 output; takes priority over port data.
P1C⁽¹⁾
0
O
DIG ECCP1 PWM Output C. May be configured for tri-state during
Enhanced PWM.
CTED1
x
I
ST CTMU Edge 1 input.
INT2
1
I
ST External Interrupt 2.
RB3/CANRX/
C2OUT/P1D/
CTED2/INT3
RB3
0
1
CANRX⁽²⁾
1
O
DIG LATB<3> data output.
I
ST PORTB<3> data input; weak pull-up when RBPU bit is cleared.
I
ST CAN bus RX.
C2OUT⁽¹⁾
x
I
ST CTMU Edge 2 input.
P1D⁽¹⁾
0
O
DIG ECCP1 PWM Output D. May be configured for tri-state during
Enhanced PWM.
CTED2
x
I
ST CTMU Edge 2 input.
INT3
1
I
ST External Interrupt 3 input.
Legend:
Note 1:
2:
3:
4:
O = Output; I = Input; ANA = Analog Signal; DIG = CMOS Output; ST = Schmitt Trigger Buffer Input;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
This pin assignment is only available for 28-pin devices (PIC18F2XK80).
This is the default pin assignment for CANRX and CANTX when the CANMX Configuration bit is set.
This is the default pin assignment for T0CKI when the T0CKMX Configuration bit is set.
This is the default pin assignment for T3CKI for 28, 40 and 44-pin devices. This is the alternate pin assignment for
T3CKI for 64-pin devices when T3CKMX is cleared.
DS39977F-page 178
 2010-2012 Microchip Technology Inc.