PIC18F26K80-I Datasheet, PDF (578/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
FIGURE 31-19: EUSARTx SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TXx/CKx
pin
RXx/DTx
pin
121
121
120
122
Note: Refer to Figure 31-3 for load conditions.
TABLE 31-23: EUSART/AUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
Param
No.
Symbol
Characteristic
Min
Max Units Conditions
120 TCKH2DTV SYNC XMIT (MASTER and SLAVE)
Clock High to Data Out Valid
—
40
ns
121 TCKRF
Clock Out Rise Time and Fall Time (Master mode)
—
20
ns
122 TDTRF Data Out Rise Time and Fall Time
—
20
ns
FIGURE 31-20: EUSART/AUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
TXx/CKx
pin
RXx/DTx
pin
125
126
Note: Refer to Figure 31-3 for load conditions.
TABLE 31-24: EUSART/AUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max Units
125 TDTV2CKL SYNC RCV (MASTER and SLAVE)
Data Hold before CKx  (DTx hold time)
10
—
ns
126 TCKL2DTL Data Hold after CKx  (DTx hold time)
15
—
ns
Conditions
DS39977F-page 578
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