PIC18F26K80-I Datasheet, PDF (54/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 3-1: OSCCON: OSCILLATOR CONTROL REGISTER (CONTINUED)
bit 2
bit 1-0
HFIOFS: HF-INTOSC Frequency Stable bit
1 = HF-INTOSC oscillator frequency is stable
0 = HF-INTOSC oscillator frequency is not stable
SCS<1:0>: System Clock Select bits⁽⁴⁾
1x = Internal oscillator block (LF-INTOSC, MF-INTOSC or HF-INTOSC)
01 = SOSC oscillator
00 = Default primary oscillator (OSC1/OSC2 or HF-INTOSC with or without PLL; defined by the
FOSC<3:0> Configuration bits, CONFIG1H<3:0>)
Note 1:
2:
3:
4:
5:
6:
The Reset state depends on the state of the IESO Configuration bit (CONFIG1H<7>).
Modifying these bits will cause an immediate clock frequency switch if the internal oscillator is providing
the device clocks.
The source is selected by the INTSRC bit (OSCTUNE<7>).
Modifying these bits will cause an immediate clock source switch.
INTSRC = OSCTUNE<7> and MFIOSEL = OSCCON2<0>.
This is the lowest power option for an internal source.
REGISTER 3-2: OSCCON2: OSCILLATOR CONTROL REGISTER 2
U-0
R-0
U-0
R/W-1
R/W-0
U-0
—
SOSCRUN
—
SOSCDRV⁽¹⁾ SOSCGO
—
bit 7
R-x
MFIOFS
R/W-0
MFIOSEL
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Read as ‘0’
bit 6
SOSCRUN: SOSC Run Status bit
1 = System clock comes from a secondary SOSC
0 = System clock comes from an oscillator other than SOSC
bit 5
Unimplemented: Read as ‘0’
bit 4
SOSCDRV: Secondary Oscillator Drive Control bit⁽¹⁾
1 = High-power SOSC circuit is selected
0 = Low/high-power select is done via the SOSCSEL<1:0> Configuration bits
bit 3
SOSCGO: Oscillator Start Control bit
1 = Oscillator is running even if no other sources are requesting it.
0 = Oscillator is shut off if no other sources are requesting it (When the SOSC is selected to run from
a digital clock input, rather than an external crystal, this bit has no effect.)
bit 2
Unimplemented: Read as ‘0’
bit 1
MFIOFS: MF-INTOSC Frequency Stable bit
1 = MF-INTOSC is stable
0 = MF-INTOSC is not stable
bit 0
MFIOSEL: MF-INTOSC Select bit
1 = MF-INTOSC is used in place of HF-INTOSC frequencies of 500 kHz, 250 kHz and 31.25 kHz
0 = MF-INTOSC is not used
Note 1: When SOSC is selected to run from a digital clock input, rather than an external crystal, this bit has no effect.
DS39977F-page 54
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