PIC18F26K80-I Datasheet, PDF (185/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 11-7: PORTD FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O I/O Type
Description
RD0/C1INA/
PSP0
RD0
0
O
DIG LATD<0> data output.
1
I
ST PORTD<0> data input.
C1INA
1
I
ANA Comparator 1 Input A.
PSP0
x
I/O
ST Parallel Slave Port data.
RD1/C1INB/
PSP1
RD1⁽¹⁾
0
O
DIG LATD<1> data output.
1
I
ST PORTD<1> data input.
C1INB⁽¹⁾
1
I
ANA Comparator 1 Input B.
PSP1⁽¹⁾
x
I/O
ST Parallel Slave Port data.
RD2/C2INA/
PSP2
RD2
0
O
DIG LATD<2> data output.
1
I
ST PORTD<2> data input.
C2INA
1
I
ANA Comparator 2 Input A.
PSP2
x
I/O
ST Parallel Slave Port data.
RD3/C2INB/
CTMUI/PSP3
RD3
0
O
DIG LATD<3> data output.
1
I
ST PORTD<3> data input.
C2INB
1
I
ANA Comparator 2 Input B.
CTMUI
x
I
— CTMU pulse generator charger for the C2INB comparator input.
PSP3
x
I/O
ST Parallel Slave Port data.
RD4/ECCP1/
P1A/PSP4
RD4
0
O
DIG LATD<4> data output.
1
I
ST PORTD<4> data input.
ECCP1
0
O
DIG ECCP1 compare output and ECCP1 PWM output; takes priority over
port data.
1
I
ST ECCP1 capture input.
P1A
0
O
DIG ECCP1 Enhanced PWM output, Channel A. May be configured for
tri-state during Enhanced PWM shutdown events; takes priority over
port data.
PSP4
x
I/O
ST Parallel Slave Port data.
RD5/P1B/PSP5
RD5
0
O
DIG LATD<5> data output.
1
I
ST PORTD<5> data input.
P1B
0
O
DIG ECCP1 Enhanced PWM output, Channel B. May be configured for
tri-state during Enhanced PWM shutdown events; takes priority over
port data.
PSP5
x
I/O
ST Parallel Slave Port data.
RD6/TX2/CK2
P1C/PSP6
RD6
0
O
DIG LATD<6> data output.
1
I
ST PORTD<6> data input.
TX2⁽¹⁾
0
O
DIG Asynchronous serial data output (EUSARTx module); takes priority
over port data.
CK2⁽¹⁾
0
O
DIG Synchronous serial clock output (EUSARTx module); user must
configure as an input.
1
I
ST Synchronous serial clock input (EUSARTx module); user must
configure as an input.
P1C
0
O
DIG ECCP1 Enhanced PWM output, Channel C. May be configured for
tri-state during Enhanced PWM.
PSP6
x
I/O
ST Parallel Slave Port data.
Legend:
Note 1:
O = Output; I = Input; ANA = Analog Signal; DIG = CMOS Output; ST = Schmitt Trigger Buffer Input;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option)
This is the pin assignment for 40 and 44-pin devices (PIC18F4XK80).
 2010-2012 Microchip Technology Inc.
DS39977F-page 185