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PIC18F26K80-I Datasheet, PDF (74/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology
PIC18F66K80 FAMILY
REGISTER 4-2: PMD1: PERIPHERAL MODULE DISABLE REGISTER 1
R/W-0
PSPMD(1)
bit 7
R/W-0
CTMUMD
R/W-0
ADCMD
R/W-0
TMR4MD
R/W-0
TMR3MD
R/W-0
TMR2MD
R/W-0
TMR1MD
R/W-0
TMR0MD
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
PSPMD: Peripheral Module Disable bit(1)
1 = The PSP module is disabled; all PSP registers are held in Reset and are not writable
0 = The PSP module is enabled
bit 6
CTMUMD: PMD CTMU Disable bit
1 = The CTMU module is disabled; all CTMU registers are held in Reset and are not writable
0 = The CTMU module is enabled
bit 5
ADCMD: A/D Module Disable bit
1 = The A/D module is disabled; all A/D registers are held in Reset and are not writable
0 = The A/D module is enabled
bit 4
TMR4MD: TMR4MD Disable bit
1 = The Timer4 module is disabled; all Timer4 registers are held in Reset and are not writable
0 = The Timer4 module is enabled
bit 3
TMR3MD: TMR3MD Disable bit
1 = The Timer3 module is disabled; all Timer3 registers are held in Reset and are not writable
0 = The Timer3 module is enabled
bit 2
TMR2MD: TMR2MD Disable bit
1 = The Timer2 module is disabled; all Timer2 registers are held in Reset and are not writable
0 = The Timer2 module is enabled
bit 1
TMR1MD: TMR1MD Disable bit
1 = The Timer1 module is disabled; all Timer1 registers are held in Reset and are not writable
0 = The Timer1 module is enabled
bit 0
TMR0MD: Timer0 Module Disable bit
1 = The Timer0 module is disabled; all Timer0 registers are held in Reset and are not writable
0 = The Timer0 module is enabled
Note 1: This bit is unimplemented on 28-pin devices (PIC18F2XK80, PIC18LF2XK80).
DS39977F-page 74
 2010-2012 Microchip Technology Inc.