PIC18F26K80-I Datasheet, PDF (96/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
RXF3EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF3SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF3SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF2EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF2EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF2SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF2SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF1EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF1EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF1SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF1SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF0EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF0EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF0SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF0SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
CANCON_RO4 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
CANSTAT_RO4 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
B5D7
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D6
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D5
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5D0
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5DLC
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -xxx xxxx
-uuu uuuu
uuuu uuuu
B5EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx x-xx
uuuu u-uu
uuuu u-uu
B5SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B5CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
CANCON_RO5 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
CANSTAT_RO5 PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1000 0000
1000 0000
uuuu uuuu
B4D7
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
B4D6
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
2:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
4: See Table 5-3 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.
DS39977F-page 96
 2010-2012 Microchip Technology Inc.