PIC18F26K80-I Datasheet, PDF (459/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 28-1: CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
U-0
—
bit 7
R/P-1
XINST
U-0
R/P-1
R/P-1
R/P-1
U-0
—
SOSCSEL1 SOSCSEL0 INTOSCSEL
—
R/P-1
RETEN
bit 0
Legend:
R = Readable bit
-n = Value at POR
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode are enabled
0 = Instruction set extension and Indexed Addressing mode are disabled (Legacy mode)
Unimplemented: Read as ‘0’
SOSCSEL<1:0>: SOSC Power Selection and Mode Configuration bits
11 = High-power SOSC circuit is selected
10 = Digital (SCLKI) mode; I/O port functionality of RC0 and RC1 is enabled
01 = Low-power SOSC circuit is selected
00 = Reserved
INTOSCSEL: LF-INTOSC Low-power Enable bit
1 = LF-INTOSC in High-Power mode during Sleep
0 = LF-INTOSC in Low-Power mode during Sleep
Unimplemented: Read as ‘0’
RETEN: VREG Sleep Enable bit
1 = Ultra low-power regulator is disabled. Regulator power in Sleep mode is controlled by REGSLP
(WDTCON<7>).
0 = Ultra low-power regulator is enabled. Regulator power in Sleep mode is controlled by SRETEN
(WDTCON<4>).
 2010-2012 Microchip Technology Inc.
DS39977F-page 459