PIC18F26K80-I Datasheet, PDF (363/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 23-7: ADRESL: A/D RESULT LOW BYTE REGISTER, RIGHT JUSTIFIED (ADFM = 1)
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
R/W-x
ADRES7
ADRES6
ADRES5 ADRES4 ADRES3
ADRES2
ADRES1 ADRES0
bit 7
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
ADRES<7:0>: A/D Result Low Byte bits
The ANCONx registers are used to configure the
operation of the I/O pin associated with each analog
channel. Clearing an ANSELx bit configures the
corresponding pin (ANx) to operate as a digital only I/O.
Setting a bit configures the pin to operate as an analog
input for either the A/D Converter or the comparator
module, with all digital peripherals disabled and digital
inputs read as ‘0’.
As a rule, I/O pins that are multiplexed with analog
inputs default to analog operation on any device Reset.
REGISTER 23-8: ANCON0: A/D PORT CONFIGURATION REGISTER 0
R/W-1
ANSEL7⁽¹⁾
bit 7
R/W-1
ANSEL6⁽¹⁾
R/W-1
ANSEL5⁽¹⁾
R/W-1
ANSEL4
R/W-1
ANSEL3
R/W-1
ANSEL2
R/W-1
ANSEL1
R/W-1
ANSEL0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
ANSEL<7:0>: Analog Port Configuration bits (AN7 and AN0)⁽¹⁾
1 = Pin configured as an analog channel: digital input disabled and any inputs read as ‘0’
0 = Pin configured as a digital port
Note 1: AN14 through AN11 and AN7 to AN5 are implemented only on 40/44-pin and 64-pin devices. For 28-pin
devices, the corresponding ANSELx bits are still implemented for these channels, but have no effect.
 2010-2012 Microchip Technology Inc.
DS39977F-page 363