PIC18F26K80-I Datasheet, PDF (109/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
FIGURE 6-6:
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
= 0100
= 0101
= 0110
= 0111
= 1000
= 1001
= 1010
= 1011
= 1100
= 1101
= 1110
= 1111
DATA MEMORY MAP FOR PIC18FX5K80 AND PIC18FX6K80 DEVICES
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
Bank 8
Bank 9
Bank 10
Bank 11
Bank 12
Bank 13
Bank 14
Data Memory Map
00h
Access RAM
000h
05Fh
FFh
GPR
060h
0FFh
00h
100h
GPR
FFh
1FFh
00h
200h
GPR
FFh
2FFh
00h
300h
GPR
FFh
3FFh
00h
400h
GPR
FFh
4FFh
00h
500h
GPR
FFh
5FFh
00h
600h
GPR
FFh
6FFh
00h
700h
GPR
FFh
7FFh
00h
800h
GPR
FFh
00h
GPR
FFh
00h
GPR
FFh
00h
GPR
FFh
00h
GPR
FFh
00h
GPR
FFh
00h
8FFh
900h
9FFh
A00h
AFFh
B00h
BFFh
C00h
CFFh
D00h
DFFh
E00h
GPR⁽¹⁾
When a = 0:
The BSR is ignored and the
Access Bank is used.
The first 96 bytes are general
purpose RAM (from Bank 0).
The second 160 bytes are
Special Function Registers
(from Bank 15).
When a = 1:
The BSR specifies the bank
used by the instruction.
Access Bank
00h
Access RAM Low _5Fh
Access RAM High ^60h
(SFRs)
FFh
Bank 15
FFh
EFFh
00h
GPR⁽¹⁾
F00h
F5Fh
FFh
SFR
F60h
FFFh
Note 1: Addresses, E41h through F5Fh, are also used by SFRs, but are not part of the Access RAM.
Users must always use the complete address, or load the proper BSR value, to access these
registers.
 2010-2012 Microchip Technology Inc.
DS39977F-page 109