PIC18F26K80-I Datasheet, PDF (380/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
24.7 Comparator Operation
During Sleep
When a comparator is active and the device is placed
in Sleep mode, the comparator remains active and the
interrupt is functional, if enabled. This interrupt will
wake-up the device from Sleep mode, when enabled.
Each operational comparator will consume additional
current.
To minimize power consumption while in Sleep mode,
turn off the comparators (CON = 0) before entering
Sleep. If the device wakes up from Sleep, the contents
of the CMxCON register are not affected.
24.8 Effects of a Reset
A device Reset forces the CMxCON registers to their
Reset state. This forces both comparators and the
voltage reference to the OFF state.
TABLE 24-3: REGISTERS ASSOCIATED WITH COMPARATOR MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE/GIEH PEIE/GIEL TMR0IE
CM1CON
CON
COE
CPOL
CM2CON
CON
COE
CPOL
CVRCON
CVREN
CVROE CVRSS
CMSTAT
CMP2OUT CMP1OUT
—
PIR4
TMR4IF
EEIF
CMP2IF
PIE4
TMR4IE
EEIE
CMP2IE
IPR4
TMR4IP
EEIP
CMP2IP
ANCON0
ANSEL7 ANSEL6 ANSEL5
ANCON1
—
ANSEL14 ANSEL13
PMD2
—
—
—
Legend: — = unimplemented, read as ‘0’.
INT0IE
EVPOL1
EVPOL1
CVR4
—
CMP1IF
CMP1IE
CMP1IP
ANSEL4
ANSEL12
—
RBIE
EVPOL0
EVPOL0
CVR3
—
—
—
—
ANSEL3
ANSEL11
MODMD
TMR0IF
CREF
CREF
CVR2
—
CCP5IF
CCP5IE
CCP5IP
ANSEL2
ANSEL10
ECANMD
INT0IF
CCH1
CCH1
CVR1
—
CCP4IF
CCP4IE
CCP4IP
ANSEL1
ANSEL9
CMP2MD
RBIF
CCH0
CCH0
CVR0
—
CCP3IF
CCP3IE
CCP3IP
ANSEL0
ANSEL8
CMP1MD
DS39977F-page 380
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