PIC18F26K80-I Datasheet, PDF (17/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
FIGURE 1-3:
PIC18F6XK80 (64-PIN) BLOCK DIAGRAM
Table Pointer<21>
inc/dec logic
21
20
Address Latch
Program Memory
Data Latch
8
Data Bus<8>
88
PCLATU PCLATH
PCU PCH PCL
Program Counter
31-Level Stack
STKPTR
Table Latch
Data Latch
Data Memory
(2/4 Kbytes)
Address Latch
12
Data Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Access
Bank
12
inc/dec
logic
ROM Latch
Instruction Bus<16>
IR
Address
Decode
OSC2/CLKO
OSC1/CLKI
Timing
Generation
INTOSC
Oscillator
16 MHz
Oscillator
Precision
Band Gap
Reference
Voltage
Regulator
Instruction
Decode and
Control
State Machine
Control Signals
8
PRODH PRODL
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
BOR and
LVD
3
BITOP
8
8 x 8 Multiply
8
W
8
8
8
8
ALU<8>
8
VDDCORE/VCAP VDD, VSS
MCLR
PORTA
RA<3:0>
RA<7:5>^(1,2)
PORTB
RB<7:0>⁽¹⁾
PORTC
RC<7:0>⁽¹⁾
PORTD
RD<7:0>⁽¹⁾
PORTE
RE<7:0>^(1,3)
PORTF
RF<7:0>⁽¹⁾
PORTG
RG<4:0>⁽¹⁾
Timer0
Timer1
Timer2/4
Timer3
CTMU
A/D
12-Bit
Comparator
1/2
CCP2/3/4/5
ECCP1 EUSART1 EUSART2 MSSP
ECAN
PSP
DSM
Note 1: See Table 1-6 for I/O port pin descriptions.
2: RA6 and RA7 are only available as digital I/O in select oscillator modes. For more information, see Section 3.0 “Oscillator
Configurations”.
3: RE3 is only available when the MCLRE Configuration bit is cleared (MCLRE = 0).
 2010-2012 Microchip Technology Inc.
DS39977F-page 17