PIC18F26K80-I Datasheet, PDF (90/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
BAUDCON2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 01x0 0-00
01x0 0-00 uuuu u-uu
IPR4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1111 -111
1111 -111 uuuu -uuu
PIR4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 -000
0000 -000 uuuu -uuu
PIE4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 -000
0000 -000 uuuu -uuu
CVRCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
CMSTAT
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xx-- ----
xx-- ---- uu-- ----
TMR3H
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu uuuu uuuu
TMR3L
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu uuuu uuuu
T3CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
T3GCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0x00
0000 0x00 uuuu u-uu
SPBRG1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
RCREG1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
TXREG1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
TXSTA1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0010
0000 0010 uuuu uuuu
RCSTA1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 000x
0000 000x uuuu uuuu
T1GCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0x00
0000 0x00 uuuu u-uu
PR4
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1111 1111
1111 1111 uuuu uuuu
HLVDCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
BAUDCON1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 01x0 0-00
01x0 0-00 uuuu u-uu
RCSTA2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 000x
0000 000x uuuu uuuu
IPR3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --11 111-
--11 111- --uu uuu-
PIR3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 000-
--x0 xxx- --uu uuu-
PIE3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 --00 000-
0000 0000 uuuu uuuu
IPR2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1--- 1111
1--- 111x u--- uuuu
PIR2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0--- 0000
0--- 000x u--- uuuu⁽¹⁾
PIE2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0--- 0000
0--- 0000 u--- uuuu
IPR1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 1111 1111
1111 1111 uuuu uuuu
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -111 1111
-111 1111 -uuu uuuu
PIR1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu⁽¹⁾
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -000 0000
-000 0000 -uuu uuuu
PIE1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 -000 0000
-000 0000 -uuu uuuu
PSTR1CON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 00-0 0001
xx-x xxxx
—
OSCTUNE
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000 uuuu uuuu
REFOCON
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0-00 0000
0-00 0000 u-uu uuuu
Legend:
Note 1:
2:
3:
4:
5:
u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
See Table 5-3 for Reset value for specific conditions.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.
DS39977F-page 90
 2010-2012 Microchip Technology Inc.