PIC18F26K80-I Datasheet, PDF (114/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN™ and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 6-2: PIC18F66K80 FAMILY REGISTER FILE SUMMARY (CONTINUED)
Addr. File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
on page
FCFh TMR1H
Timer1 Register High Byte
89
FCEh TMR1L
Timer1 Register Low Bytes
89
FCDh T1CON
TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 SOSCEN T1SYNC
RD16
TMR1ON
89
FCCh TMR2
Timer2 Register
89
FCBh PR2
Timer2 Period Register
89
FCAh T2CON
—
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
89
FC9h SSPBUF
MSSP Receive Buffer/Transmit Register
89
FC8h SSPADD
MSSP Address Register (I²C™ Slave Mode), MSSP Baud Rate Reload Register (I²C Master Mode)
89
FC8h SSPMSK
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
89
FC7h SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
89
FC6h SSPCON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
89
FC5h SSPCON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
89
FC4h ADRESH
A/D Result Register High Byte
89
FC3h ADRESL
A/D Result Register Low Byte
89
FC2h ADCON0
—
CHS4
CHS3
CHS2
CHS1
CHS0
GO/DONE
ADON
89
FC1h ADCON1
TRIGSEL1 TRIGSEL0 VCFG1
VCFG0
VNCFG
CHSN2
CHSN1
CHSN0
89
FC0h ADCON2
ADFM
—
ACQT2
ACQT1
ACQT0
ADCS2
ADCS1
ADCS0
89
FBFh ECCP1AS
ECCP1ASE ECCP1AS2 ECCP1AS1 ECCP1AS0 PSS1AC1 PSS1AC0 PSS1BD1 PSS1BD0
89
FBEh ECCP1DEL
P1RSEN
P1DC6
P1DC5
P1DC4
P1DC3
P1DC2
P1DC1
P1DC0
89
FBDh CCPR1H
Capture/Compare/PWM Register 1 High Byte
89
FBCh CCPR1L
Capture/Compare/PWM Register 1 Low Byte
89
FBBh CCP1CON
P1M1
P1M0
DC1B1
DC1B0
CCP1M3 CCP1M2 CCP1M1 CCP1M0
89
FBAh TXSTA2
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
89
FB9h BAUDCON2
ABDOVF
RCIDL
RXDTP
TXCKP
BRG16
—
WUE
ABDEN
89
FB8h IPR4
TMR4IP
EEIP
CMP2IP
CMP1IP
—
CCP5IP
CCP4IP
CCP3IP
89
FB7h PIR4
TMR4IF
EEIF
CMP2IF
CMP1IF
—
CCP5IF
CCP4IF
CCP3IF
89
FB6h PIE4
TMR4IE
EEIE
CMP2IE
CMP1IE
—
CCP5IE
CCP4IE
CCP3IE
89
FB5h CVRCON
CVREN
CVROE
CVRSS
CVR4
CVR3
CVR2
CVR1
CVR0
89
FB4h CMSTAT
CMP2OUT CMP1OUT
—
—
—
—
—
—
89
FB3h TMR3H
Timer3 Register High Byte
89
FB2h TMR3L
Timer3 Register Low Bytes
89
FB1h T3CON
TMR3CS1 TMR3CS0 T3CKPS1 T3CKPS0 SOSCEN T3SYNC
RD16
TMR3ON
89
FB0h T3GCON
TMR3GE T3GPOL
T3GTM
T3GSPM T3GGO/ T3GVAL T3GSS1 T3GSS0
89
T3DONE
FAFh SPBRG1
EUSART1 Baud Rate Generator Register Low Byte
89
FAEh RCREG1
EUSART1 Receive Register
89
FADh TXREG1
EUSART1 Transmit Register
89
FACh TXSTA1
CSRC
TX9
TXEN
SYNC
SENDB
BRGH
TRMT
TX9D
89
FABh RCSTA1
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
89
FAAh T1GCON
TMR1GE T1GPOL
T1GTM
T1GSPM T1GGO/ T1GVAL T1GSS1 T1GSS0
89
T1DONE
FA9h PR4
Timer4 Period Register
89
FA8h HLVDCON
VDIRMAG BGVST
IRVST
HLVDEN HLVDL3
HLVDL2
HLVDL1
HLVDL0
89
FA7h BAUDCON1
ABDOVF
RCIDL
RXDTP
TXCKP
BRG16
—
WUE
ABDEN
89
FA6h RCSTA2
SPEN
RX9
SREN
CREN
ADDEN
FERR
OERR
RX9D
89
FA5h IPR3
—
—
RC2IP
TX2IP
CTMUIP
CCP2IP
CCP1IP
—
89
FA4h PIR3
—
—
RC2IF
TX2IF
CTMUIF
CCP2IF
CCP1IF
—
89
FA3h PIE3
—
—
RC2IE
TX2IE
CTMUIE
CCP2IE
CCP1IE
—
89
FA2h IPR2
OSCFIP
—
—
—
BCLIP
HLVDIP
TMR3IP TMR3GIP
89
FA1h PIR2
OSCFIF
—
—
—
BCLIF
HLVDIF
TMR3IF TMR3GIF
89
FA0h PIE2
OSCFIE
—
—
—
BCLIE
HLVDIE
TMR3IE TMR3GIE
89
DS39977F-page 114
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