MC9S12Q128_10 Datasheet, PDF (87/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

2.3.2.2.6
Chapter 2 Port Integration Module (PIM9C32) Block Description
Port S Polarity Select Register (PPSS)
Module Base + 0x000D
7
R
0
W
Reset
0
Read: Anytime.
Write: Anytime.
6
5
4
3
2
0
0
0
PPSS3
PPSS2
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-15. Port S Polarity Select Register (PPSS)
Table 2-14. PPSS Field Descriptions
1
PPSS1
0
0
PPSS0
0
Field
Description
3–0
PPSS[3:0]
Pull Select Port S — This register selects whether a pull-down or a pull-up device is connected to the pin.
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
and if the port is used as input or as wired-or output.
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
and if the port is used as input.
2.3.2.2.7 Port S Wired-OR Mode Register (WOMS)
Module Base + 0x000E
7
6
5
4
3
2
1
0
R
0
0
0
0
WOMS3
WOMS2
WOMS1
WOMS0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-16. Port S Wired-Or Mode Register (WOMS)
Read: Anytime.
Write: Anytime.
Table 2-15. WOMS Field Descriptions
Field
Description
3–0
WOMS[3:0]
Wired-OR Mode Port S — This register configures the output pins as wired-or. If enabled the output is driven
active low only (open-drain). A logic level of “1” is not driven. This bit has no influence on pins used as inputs.
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
Freescale Semiconductor
MC9S12Q128
87
Rev 1.10