MC9S12Q128_10 Datasheet, PDF (55/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 1 MC9S12Q Device Overview (MC9S12Q128-Family)
1.3.4.27 PS[3:2] — Port S I/O Pins [3:2]
PS3 and PS2 are general purpose input or output pins. These pins are not available in the 48- / 52-pin
package versions.
1.3.4.28 PS1 / TXD — Port S I/O Pin 1
PS1 is a general purpose input or output pin and the transmit pin, TXD, of serial communication interface
(SCI).
1.3.4.29 PS0 / RXD — Port S I/O Pin 0
PS0 is a general purpose input or output pin and the receive pin, RXD, of serial communication interface
(SCI).
1.3.4.30 PT[7:5] / IOC[7:5] — Port T I/O Pins [7:5]
PT7–PT5 are general purpose input or output pins. They can also be configured as the timer system input
capture or output compare pins IOC7-IOC5.
1.3.4.31 PT[4:0] / IOC[4:2] / PW[3:0]— Port T I/O Pins [4:0]
PT4–PT0 are general purpose input or output pins. They can also be configured as the timer system input
capture or output compare pins IOC[n] or as the PWM outputs PW[n].
1.3.5 Power Supply Pins
1.3.5.1 V_DDX,V_SSX — Power and Ground Pins for I/O Drivers
External power and ground for I/O drivers. Bypass requirements depend on how heavily the MCU pins are
loaded.
1.3.5.2 V_DDR, V_SSR — Power and Ground Pins for I/O Drivers and for Internal
Voltage Regulator
External power and ground for the internal voltage regulator. Connecting V_DDR to ground disables the
internal voltage regulator.
1.3.5.3 V_DD1, V_DD2, V_SS1, V_SS2 — Internal Logic Power Pins
Power is supplied to the MCU through V_DD and V_SS. This 2.5V supply is derived from the internal voltage
regulator. There is no static load on those pins allowed. The internal voltage regulator is turned off, if V_DDR
is tied to ground.
Freescale Semiconductor
MC9S12Q128
55
Rev 1.10