MC9S12Q128_10 Datasheet, PDF (362/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 12 Pulse-Width Modulator (PWM8B4CRev 01.24) Block Description
In concatenated mode, writes to the 16-bit counter by using a 16-bit access or writes to either the low- or
high-order byte of the counter will reset the 16-bit counter. Reads of the 16-bit counter must be made by
16-bit access to maintain data coherency.
NOTE
Writing to the counter while the channel is enabled can cause an irregular
PWM cycle to occur.
Module Base + 0x000C
7
6
5
4
3
2
1
0
R Bit 7
6
5
4
3
2
1
Bit 0
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Figure 12-15. PWM Channel Counter Registers (PWMCNT0)
Module Base + 0x000D
7
6
5
4
3
2
1
0
R Bit 7
6
5
4
3
2
1
Bit 0
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Figure 12-16. PWM Channel Counter Registers (PWMCNT1)
Module Base + 0x000E
7
6
5
4
3
2
1
0
R Bit 7
6
5
4
3
2
1
Bit 0
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Figure 12-17. PWM Channel Counter Registers (PWMCNT2)
Module Base + 0x000F
7
6
5
4
3
2
1
0
R Bit 7
6
5
4
3
2
1
Bit 0
W
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Figure 12-18. PWM Channel Counter Registers (PWMCNT3)
Read: anytime
Write: anytime (any value written causes PWM counter to be reset to 0x0000).
362
MC9S12Q128
Freescale Semiconductor
Rev 1.10