MC9S12Q128_10 Datasheet, PDF (138/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 4 Multiplexed External Bus Interface (MEBIV3)
4.3.2.5 Reserved Registers
Module Base + 0x0004
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-6. Reserved Register
Module Base + 0x0005
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-7. Reserved Register
Module Base + 0x0006
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-8. Reserved Register
Module Base + 0x0007
Starting address location affected by INITRG register setting.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 4-9. Reserved Register
138
MC9S12Q128
Freescale Semiconductor
Rev 1.10