MC9S12Q128_10 Datasheet, PDF (17/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 1
MC9S12Q Device Overview (MC9S12Q128-Family)
1.1 Introduction
The MC9S12Q128-Family is a 48/52/80 pin Flash-based MCU family, which delivers the power and
flexibility of the 16 Bit core to a whole new range of cost and space sensitive, general purpose Industrial
and Automotive network applications All MC9S12Q128-Familymembers feature standard on-chip
peripherals including a 16-bit central processing unit (CPU12), up to 128K bytes of Flash EEPROM (or
ROM), up to 4K bytes of RAM, an asynchronous serial communications interface (SCI), a serial peripheral
interface (SPI), a 6-channel 16-bit timermodule (TIM), a 4-channel 8-bit pulse width modulator (PWM),
an 8-channel, 10-bit analog-to-digital converter (ADC).
All MC9S12Q128-Family devices feature full 16-bit data paths throughout. The inclusion of a PLL circuit
allows power consumption and performance to be adjusted to suit operational requirements. In addition to
the I/O ports available in each module, up to 10 dedicated I/O port bits are available with wake-up
capability from stop or wait mode. The MC9S12Q128-Family devices are available in 48-, 52-, and 80-pin
QFP packages, with the 80-pin version pin compatible to the HCS12 A, B,, C and D Family derivatives.
1.1.1 Features
• 16-bit HCS12 core:
— HCS12 CPU
– Upward compatible with M68HC11 instruction set
– Interrupt stacking and programmer’s model identical to M68HC11
– Instruction queue
– Enhanced indexed addressing
— MMC (memory map and interface)
— INT (interrupt control)
— BDM (background debug mode)
— DBG12 (enhanced debug12 module, including breakpoints and change-of-flow trace buffer)
— MEBI (multiplexed expansion bus interface) available only in 80-pin package version
• Wake-up interrupt inputs:
— Up to 12 port bits available for wake up interrupt function with digital filtering
Freescale Semiconductor
MC9S12Q128
17
Rev 1.10