MC9S12Q128_10 Datasheet, PDF (506/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 18 64 Kbyte Flash Module (S12FTS64KV4)
FPHDIS is cleared. The FPROT register is loaded from Flash address 0xFF0D during the reset sequence,
indicated by F in Figure 18-8.
To change the Flash protection that will be loaded on reset, the upper sector of the Flash array must be
unprotected, then the Flash protection byte located at Flash address 0xFF0D must be written to.
A protected Flash sector is disabled by FPHDIS and FPLDIS while the size of the protected sector is
defined by FPHS[1:0] and FPLS[1:0] in the FPROT register.
Trying to alter any of the protected areas will result in a protect violation error and the PVIOL flag will be
set in the FSTAT register (see Section 18.3.2.6). A mass erase of the whole Flash array is only possible
when protection is fully disabled by setting the FPOPEN, FPLDIS, and FPHDIS bits. An attempt to mass
erase a Flash array while protection is enabled will set the PVIOL flag in the FSTAT register.
Table 18-8. FPROT Field Descriptions
Field
Description
7
FPOPEN
Protection Function for Program or Erase — It is possible using the FPOPEN bit to either select address
ranges to be protected using FPHDIS, FPLDIS, FPHS[1:0] and FPLS[1:0] or to select the same ranges to be
unprotected. When FPOPEN is set, FPxDIS enables the ranges to be protected, whereby clearing FPxDIS
enables protection for the range specified by the corresponding FPxS[1:0] bits. When FPOPEN is cleared,
FPxDIS defines unprotected ranges as specified by the corresponding FPxS[1:0] bits. In this case, setting
FPxDIS enables protection. Thus the effective polarity of the FPxDIS bits is swapped by the FPOPEN bit as
shown in Table 18-9. This function allows the main part of the Flash array to be protected while a small range
can remain unprotected for EEPROM emulation.
0 The FPHDIS and FPLDIS bits define Flash address ranges to be unprotected
1 The FPHDIS and FPLDIS bits define Flash address ranges to be protected
6
Nonvolatile Flag Bit — The NV6 bit should remain in the erased state for future enhancements.
NV6
5
FPHDIS
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in the higher space of the Flash address map.
0 Protection/unprotection enabled
1 Protection/unprotection disabled
4–3
Flash Protection Higher Address Size — The FPHS[1:0] bits determine the size of the protected/unprotected
FPHS[1:0] sector as shown in Table 18-10. The FPHS[1:0] bits can only be written to while the FPHDIS bit is set.
2
FPLDIS
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected sector in the lower space of the Flash address map.
0 Protection/unprotection enabled
1 Protection/unprotection disabled
1–0
Flash Protection Lower Address Size — The FPLS[1:0] bits determine the size of the protected/unprotected
FPLS[1:0] sector as shown in Table 18-11. The FPLS[1:0] bits can only be written to while the FPLDIS bit is set.
506
MC9S12Q128
Freescale Semiconductor
Rev 1.10