MC9S12Q128_10 Datasheet, PDF (307/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
10.3.2.12 MSCAN Identifier Acceptance Control Register (CANIDAC)
The CANIDAC register is used for identifier acceptance control as described below.
Module Base + 0x000B
R
W
Reset:
7
6
5
4
3
2
1
0
0
0
IDHIT2
IDHIT1
IDAM1
IDAM0
0
0
0
0
0
0
0
= Unimplemented
Figure 10-15. MSCAN Identifier Acceptance Control Register (CANIDAC)
0
IDHIT0
0
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are read-
only
Table 10-16. CANIDAC Register Field Descriptions
Field
Description
5:4
IDAM[1:0]
2:0
IDHIT[2:0]
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see Section 10.4.3, “Identifier Acceptance Filter”). Table 10-17 summarizes the different settings. In filter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 10.4.3, “Identifier Acceptance Filter”). Table 10-18 summarizes the different settings.
IDAM1
0
0
1
1
IDHIT2
0
0
0
0
1
1
1
1
Table 10-17. Identifier Acceptance Mode Settings
IDAM0
0
1
0
1
Identifier Acceptance Mode
Two 32-bit acceptance filters
Four 16-bit acceptance filters
Eight 8-bit acceptance filters
Filter closed
Table 10-18. Identifier Acceptance Hit Indication
IDHIT1
0
0
1
1
0
0
1
1
IDHIT0
0
1
0
1
0
1
0
1
Identifier Acceptance Hit
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
Freescale Semiconductor
MC9S12Q128
307
Rev 1.10