MC9S12Q128_10 Datasheet, PDF (290/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
10.3 Memory Map and Register Definition
This section provides a detailed description of all registers accessible in the MSCAN.
10.3.1 Module Memory Map
Figure 10-3 gives an overview on all registers and their individual bits in the MSCAN memory map. The
register address results from the addition of base address and address offset. The base address is
determined at the MCU level and can be found in the MCU memory map description. The address offset
is defined at the module level.
The MSCAN occupies 64 bytes in the memory space. The base address of the MSCAN module is
determined at the MCU level when the MCU is defined. The register decode map is fixed and begins at the
first address of the module address offset.
The detailed register descriptions follow in the order they appear in the register map.
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MC9S12Q128
Freescale Semiconductor
Rev 1.10