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MC9S12Q128_10 Datasheet, PDF (615/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers
Appendix A Electrical Characteristics
A.3 MSCAN
Table A-14. MSCAN Wake-up Pulse Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
1 P MSCAN Wake-up dominant pulse filtered
2 P MSCAN Wake-up dominant pulse pass
Symbol Min Typ Max Unit
tWUP
tWUP
—
—
2
us
5
—
—
us
A.4 Reset, Oscillator and PLL
This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and
Phase-Locked-Loop (PLL).
A.4.1 Startup
Table A-15 summarizes several startup characteristics explained in this section. Detailed description of the
startup behavior can be found in the Clock and Reset Generator (CRG) Block User Guide.
Table A-15. Startup Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
T POR release level
VPORR
—
—
2.07
V
2
T POR assert level
VPORA
0.97
—
—
V
3
D Reset input pulse width, minimum input time PWRSTL
2
—
—
tosc
4
D Startup from Reset
nRST
192
—
196
nosc
5
D
Interrupt pulse width, IRQ edge-sensitive
mode
PWIRQ
20
—
—
ns
6
D Wait recovery startup time
tWRS
—
—
14
tcyc
A.4.1.1 POR
The release level VPORR and the assert level VPORA are derived from the VDD supply. They are also valid
if the device is powered externally. After releasing the POR reset the oscillator and the clock quality check
are started. If after a time tCQOUT no valid oscillation is detected, the MCU will start using the internal self
clock. The fastest startup time possible is given by nuposc.
A.4.1.2 LVR
The release level VLVRR and the assert level VLVRA are derived from the VDD supply. They are also valid
if the device is powered externally. After releasing the LVR reset the oscillator and the clock quality check
are started. If after a time tCQOUT no valid oscillation is detected, the MCU will start using the internal self
clock. The fastest startup time possible is given by nuposc.
Freescale Semiconductor
MC9S12Q128
615
Rev 1.10