MC9S12Q128_10 Datasheet, PDF (199/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 7 Debug Module (DBGV1) Block Description
Table 7-3. DBGC1 Field Descriptions (continued)
Field
Description
3
DBGBRK
1:0
CAPMOD
DBG Breakpoint Enable Bit — The DBGBRK bit controls whether the debugger will request a breakpoint based
on comparator A and B to the CPU upon completion of a tracing session. Please refer to Section 7.4.3,
“Breakpoints,” for further details.
0 CPU break request not enabled
1 CPU break request enabled
Capture Mode Field — See Table 7-4 for capture mode field definitions. In LOOP1 mode, the debugger will
automatically inhibit redundant entries into capture memory. In detail mode, the debugger is storing address and
data for all cycles except program fetch (P) and free (f) cycles. In profile mode, the debugger is returning the
address of the last instruction executed by the CPU on each access of trace buffer address. Refer to
Section 7.4.2.6, “Capture Modes,” for more information.
Table 7-4. CAPMOD Encoding
CAPMOD
00
01
10
11
Description
Normal
LOOP1
DETAIL
PROFILE
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