MC9S12Q128_10 Datasheet, PDF (611/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Appendix A Electrical Characteristics
A.2.2 ATD Operating Characteristics In 3.3V Range
The Table A-11 shows conditions under which the ATD operates.
The following constraints exist to obtain full-scale, full range results: V_SSA ≤ V_RL ≤ V_IN ≤ V_RH ≤ V_DDA.
This constraint exists since the sample buffer amplifier can not drive beyond the power supply levels that
it ties to. If the input level goes outside of this range it will effectively be clipped
Table A-11. ATD Operating Characteristics
Conditions are shown in Table A-4 unless otherwise noted; Supply Voltage 3.3V-10% <= V_DDA <= 3.3V+10%
Num C
Rating
Symbol
Min
Typ
Max
Unit
Reference Potential
1D
Low
V_RL
V_SSA
—
V_DDA/2
V
High V_RH
V_DDA/2
—
V_DDA
V
2 C Differential Reference Voltage
V_RH-V_RL
3.0
3.3
3.6
V
3 D ATD Clock Frequency
f_ATDCLK
0.5
—
2.0
MHz
ATD 10-Bit Conversion Period
4D
Clock Cycles⁽¹⁾ N_CONV10
14
—
28
Cycles
Conv, Time at 2.0MHz ATD Clock f_ATDCLK T_CONV10
7
—
14
µs
ATD 8-Bit Conversion Period
5D
Clock Cycles¹ N_CONV8
12
—
26
Cycles
Conv, Time at 2.0MHz ATD Clock f_ATDCLK T_CONV8
6
—
13
µs
6 D Recovery Time (V_DDA=3.3 Volts)
t_REC
—
—
20
µs
7 P Reference Supply current
I_REF
—
—
0.250
mA
1. The minimum time assumes a final sample period of 2 ATD clocks cycles while the maximum time assumes a final sample
period of 16 ATD clocks.
A.2.3 Factors Influencing Accuracy
Three factors — source resistance, source capacitance and current injection — have an influence on the
accuracy of the ATD.
A.2.3.1 Source Resistance
Due to the input pin leakage current as specified in Table A-6 in conjunction with the source resistance
there will be a voltage drop from the signal source to the ATD input. The maximum source resistance R_S
specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or
operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source
resistance is allowable.
A.2.3.2 Source Capacitance
When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due
to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input
voltage ≤ 1LSB, then the external filter capacitor, C_f ≥ 1024 * (C_INS – C_INN).
Freescale Semiconductor
MC9S12Q128
611
Rev 1.10