MC9S12Q128_10 Datasheet, PDF (539/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 19 96 Kbyte Flash Module (S12FTS96KV1)
19.3.2.4 Flash Configuration Register (FCNFG)
The FCNFG register enables the Flash interrupts and gates the security backdoor key writes.
Module Base + 0x0003
7
6
5
4
3
2
1
0
R
0
0
0
0
0
CBEIE
CCIE
KEYACC
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-7. Flash Configuration Register (FCNFG)
CBEIE, CCIE, and KEYACC are readable and writable while remaining bits read 0 and are not writable.
KEYACC is only writable if the KEYEN bit in the FSEC register is set to the enabled state (see Section
19.3.2.2).
Table 19-7. FCNFG Field Descriptions
Field
7
CBEIE
6
CCIE
5
KEYACC
Description
Command Buffer Empty Interrupt Enable — The CBEIE bit enables the interrupts in case of an empty
command buffer in the Flash module.
0 Command Buffer Empty interrupts disabled
1 An interrupt will be requested whenever the CBEIF flag is set (see Section 19.3.2.6)
Command Complete Interrupt Enable — The CCIE bit enables the interrupts in case of all commands being
completed in the Flash module.
0 Command Complete interrupts disabled
1 An interrupt will be requested whenever the CCIF flag is set (see Section 19.3.2.6)
Enable Security Key Writing.
0 Flash writes are interpreted as the start of a command write sequence
1 Writes to the Flash array are interpreted as a backdoor key while reads of the Flash array return invalid data
19.3.2.5 Flash Protection Register (FPROT)
The FPROT register defines which Flash sectors are protected against program or erase.
Module Base + 0x0004
7
R
FPOPEN
W
Reset
F
6
NV6
5
FPHDIS
4
FPHS1
3
FPHS0
2
FPLDIS
F
F
F
F
F
Figure 19-8. Flash Protection Register (FPROT)
1
FPLS1
F
0
FPLS0
F
The FPROT register is readable in normal and special modes. FPOPEN can only be written from a 1 to a 0.
FPLS[1:0] can be written anytime until FPLDIS is cleared. FPHS[1:0] can be written anytime until
Freescale Semiconductor
MC9S12Q128
539
Rev 1.10