MC9S12Q128_10 Datasheet, PDF (169/644 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

6.3.2 Register Descriptions
Chapter 6 Background Debug Module (BDMV4) Block Description
Register
Name
0xFF00
Reserved
0xFF01
BDMSTS
0xFF02
Reserved
0xFF03
Reserved
0xFF04
Reserved
0xFF05
Reserved
0xFF06
BDMCCR
0xFF07
BDMINR
0xFF08
Reserved
0xFF09
Reserved
0xFF0A
Reserved
0xFF0B
Reserved
Bit 7
R
X
W
R
ENBDM
W
R
X
W
R
X
W
R
X
W
R
X
W
R
CCR7
W
R
0
W
R
0
W
R
0
W
R
X
W
R
X
W
X
6
5
4
3
X
X
X
X
BDMACT
SDV
TRACE
ENTAG
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
CCR6
REG14
CCR5
REG13
CCR4
REG12
CCR3
REG11
0
0
0
0
0
0
0
0
X
X
X
X
X
X
X
X
= Unimplemented, Reserved
= Indeterminate
0
Figure 6-2. BDM Register Summary
2
1
Bit 0
X
0
0
UNSEC
0
CLKSW
X
X
X
X
X
X
X
X
X
X
X
X
CCR2
0
CCR1
0
CCR0
0
0
0
0
0
0
0
X
X
X
X
X
X
= Implemented (do not alter)
= Always read zero
Freescale Semiconductor
MC9S12Q128
169
Rev 1.10