MC68HC11P2 Datasheet, PDF (82/268 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Parallel Input/Output
4.9.1 PORTG — Port G data register
Port G data (PORTG)
Address bit 7
$007E PG7
bit 6
PG6
bit 5
PG5
bit 4
PG4
bit 3
PG3
bit 2
PG2
bit 1
PG1
bit 0
State
on reset
PG0 undefined
The bits may be read and written at any time and are not affected by
reset.
4.9.2 DDRG — Data direction register for port G
Data direction G (DDRG)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$007F DDG7 DDG6 DDG5 DDG4 DDG3 DDG2 DDG1 DDG0 0000 0000
DDG[7:0] — Data direction for port G
1 = The corresponding pin is configured as an output.
0 = The corresponding pin is configured as an input.
4.10 Port H
Port H is an 8-bit bidirectional port, with both data and data direction
registers. In addition to their I/O capability, port H pins are shared with
SCI/MI BUS and PWM functions, as shown in the following table.
Pin
Alternate
function
PH0
PW1

PH1
PW2
 See Timing System
PH2
PW3


for more information.
PH3
PW4

PH4
PH5
PH6
RXD2
TXD2
RXD3




See Serial Communications
Interface (SCI) and Motorola
Interconnect Bus (MI BUS)
PH7
TXD3
 ^{for more information.}
On reset the pins are configured as general purpose high-impedance
Technical Data
Parallel Input/Output
For More Information On This Product,
Go to: www.freescale.com
MC68HC11P2 — Rev 1.0