MC68HC11P2 Datasheet, PDF (183/268 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Analog-to-Digital Converter
Control, status and results registers
Channel select
control bits
CD:CC:CB:CA
0000
0001
0010
0011
0100
0101
0110
0111
10XX
1100
1101
1110
1111
Channel
signal
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
reserved
V_RH(1)
V_RL(1)
V_RH/2⁽¹⁾
reserved⁽¹⁾
Result in ADRx
if MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
—
ADR1
ADR2
ADR3
ADR4
1. Used for factory testing.
9.6.2 ADR1–ADR4 — A/D converter results registers
A/D result 1 (ADR1)
A/D result 2 (ADR2)
A/D result 3 (ADR3)
A/D result 4 (ADR4)
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$0031 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
$0032 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
$0033 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
$0034 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
These read-only registers hold an 8-bit conversion result. Writes to these
registers have no effect. Data in the A/D converter result registers is valid
when the CCF flag in the ADCTL register is set, indicating a conversion
sequence is complete. If conversion results are needed sooner, refer to
Figure 9-3, which shows the A/D conversion sequence diagram.
MC68HC11P2 — Rev 1.0
Analog-to-Digital Converter
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Technical Data