MC68HC11P2 Datasheet, PDF (56/268 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
Table 3-5. RAM and register remapping
RAM[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Location
$0000–$03FF
$1000–$13FF
$2000–$23FF
$3000–$33FF
$4000–$43FF
$5000–$53FF
$6000–$63FF
$7000–$73FF
$8000–$83FF
$9000–$93FF
$A000–$A3FF
$B000–$B3FF
$C000–$C3FF
$D000–$D3FF
$E000–$E3FF
$F000–$F3FF
REG[3:0] Location
0000 $0000–$007F
0001 $1000–$107F
0010 $2000–$207F
0011 $3000–$307F
0100 $4000–$407F
0101 $5000–$507F
0110 $6000–$607F
0111 $7000–$707F
1000 $8000–$807F
1001 $9000–$907F
1010 $A000–$A07F
1011 $B000–$B07F
1100 $C000–$C07F
1101 $D000–$D07F
1110 $E000–$E07F
1111 $F000–$F07F
NOTE:
When the memory map has the 128-byte register block mapped at the
same location as RAM, the registers have priority and the RAM is
relocated to the memory space immediately following the register block.
This mapping feature keeps all the RAM available for use. Refer to
Figure 3-2, which illustrates the overlap.
Technical Data
Operating Modes and On-Chip Memory
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MC68HC11P2 — Rev 1.0