MC68HC11P2 Datasheet, PDF (118/268 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Motorola Interconnect Bus (MI BUS)
6.10.1 INIT2 — EEPROM mapping and MI BUS delay register
EEPROM mapping (INIT2)
Address bit 7 bit 6
$0037 EE3 EE2
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
EE1 EE0 M3DL1 M3DL0 M2DL1 M2DL0 0000 0000
This register sets the MI BUS delay time. INIT2 may be read at any time
but bits 7–4 may be written only once after reset in normal modes (bits
3–0 may be written at any time).
EE[3:0] — EEPROM map position
EEPROM is located at $xD80–$xFFF, where x is the hexadecimal
digit represented by EE[3:0]. Refer to INIT2 — EEPROM mapping
and MI BUS delay register.
M3DL1:M3DL0, M2DL1:M2DL0 — MI BUS delay select
These bits are used to set up the delay for the start of the NRZ receive
for MI BUS operation as shown (for a 20kHz bit rate) in the following
table. Each MI BUS module is controlled by one pair of bits.
MxDL1
0
0
1
1
MxDL0
0
1
0
1
Delay factor
1
2
3
4
Delay time⁽¹⁾
1.5625 µs⁽²⁾
3.1250 µs
4.6875 µs
6.2500 µs
1. 20kHz bit rate requires 25µs (40kHz) time slots.
2. 25µs ÷ 16
Technical Data
Motorola Interconnect Bus (MI BUS)
For More Information On This Product,
Go to: www.freescale.com
MC68HC11P2 — Rev 1.0