MC68HC11P2 Datasheet, PDF (47/268 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Operating Modes and On-Chip Memory
On-chip memory
3.4.2 Registers
In Table 3-2, a summary of registers and control bits, the registers are
shown in ascending order within the 128-byte register block. The
addresses shown are for default block mapping ($0000–$007F),
however, the INIT register remaps the block to any 4k page
($x000–$x07F).
Table 3-2. Register and control bit assignments (Sheet 1 of 4)
Register name
Address bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Port A data (PORTA)
$0000 PA7 PA6 PA5 PA4 PA3 PA2 PA1 PA0 undefined
Data direction A (DDRA)
$0001 DDA7 DDA6 DDA5 DDA4 DDA3 DDA2 DDA1 DDA0 0000 0000
Data direction B (DDRB)
$0002 DDB7 DDB6 DDB5 DDB4 DDB3 DDB2 DDB1 DDB0 0000 0000
Data direction F (DDRF)
$0003 DDF7 DDF6 DDF5 DDF4 DDF3 DDF2 DDF1 DDF0 0000 0000
Port B data (PORTB)
$0004 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 undefined
Port F data (PORTF)
$0005 PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0 undefined
Port C data (PORTC)
$0006 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 undefined
Data direction C (DDRC)
$0007 DDC7 DDC6 DDC5 DDC4 DDC3 DDC2 DDC1 DDC0 0000 0000
Port D data (PORTD)
$0008 0
0 PD5 PD4 PD3 PD2 PD1 PD0 undefined
Data direction D (DDRD)
$0009 0
0 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 0000 0000
Port E data (PORTE)
$000A PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0 undefined
Timer compare force (CFORC) $000B FOC1 FOC2 FOC3 FOC4 FOC5 0
0
0 0000 0000
Output compare 1 mask (OC1M) $000C OC1M7 OC1M6 OC1M5 OC1M4 OC1M3 0
0
0 0000 0000
Output compare 1 data (OC1D) $000D OC1D7 OC1D6 OC1D5 OC1D4 OC1D3 0
0
0 0000 0000
Timer count (TCNT) high
$000E (bit 15) (14) (13) (12) (11) (10) (9) (bit 8) 0000 0000
Timer count (TCNT) low
$000F (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) 0000 0000
Timer input capture 1 (TIC1) high $0010 (bit 15) (14) (13) (12) (11) (10) (9) (bit 8) undefined
Timer input capture 1 (TIC1) low $0011 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
Timer input capture 2 (TIC2) high $0012 (bit 15) (14) (13) (12) (11) (10) (9) (bit 8) undefined
Timer input capture 2 (TIC2) low $0013 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
Timer input capture 3 (TIC3) high $0014 (bit 15) (14) (13) (12) (11) (10) (9) (bit 8) undefined
Timer input capture 3 (TIC3) low $0015 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) undefined
Timer output compare 1 (TOC1) high $0016 (bit 15) (14) (13) (12) (11) (10) (9) (bit 8) 1111 1111
Timer output compare 1 (TOC1) low $0017 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) 1111 1111
Timer output compare 2 (TOC2) high $0018 (bit 15) (14) (13) (12) (11) (10) (9) (bit 8) 1111 1111
Timer output compare 2 (TOC2) low $0019 (bit 7) (6) (5) (4) (3) (2) (1) (bit 0) 1111 1111
MC68HC11P2 — Rev 1.0
Operating Modes and On-Chip Memory
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