XRT79L71 Datasheet, PDF (95/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
OPERATION INTERRUPT ENABLE REGISTER - BYTE 0 (ADDRESS = 0X0117)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Receive
UTOPIA/
POS-PHY
Interface
Block
Interrupt
Enable
Unused
Receive
ATM Cell/PPP
Processor
Block
Interrupt
Enable
Transmit
UTOPIA/
POS-PHY
Interface
Block
Interrupt
Enable
Unused
R/W
R/O
R/O
R/W
R/W
R/O
R/O
0
0
0
0
0
0
0
XRT79L71
REV. P1.0.3
BIT 0
Transmit
ATM Cell/PPP
Processor
Block
Interrupt
Enable
R/W
0
BIT NUMBER
NAME
7
Receive
UTOPIA/POS-PHY
Interface Block Interrupt
Enable
6-5
4
Unused
Receive
ATM Cell/PPP Processor
Block Interrupt Enable
TYPE
R/W
R/O
R/W
DESCRIPTION
Receive UTOPIA/POS-PHY Interface Block Interrupt Enable:
This READ/WRITE bit permit the user to either enable or disable
the Receive UTOPIA/POS-PHY Interface Block for interrupt gen-
eration. If the user writes a "0" to this register bit and disables
the "Receive UTOPIA/POS-PHY Interface Block" (for interrupt
generation), then all "Receive UTOPIA/POS-PHY Interface
Block" interrupts will be disabled for interrupt generation. If the
user writes a "1" to this register bit, he/she will still need to
enable the individual "Receive UTOPIA/POS-PHY Interface
Block" interrupt(s) at the "Source Level" in order to enable that
particular interrupt.
0 - Disable all "Receive UTOPIA/POS-PHY Interface Block"
interrupts within the device.
1 - Enables the "Receive UTOPIA/POS-PHY Interface Block" at
the "Block-Level".
Receive ATM Cell/PPP Processor Block Interrupt Enable:
This READ/WRITE bit permit the user to either enable or disable
the Receive ATM Cell/PPP Processor Block for interrupt genera-
tion. If the user writes a "0" to this register bit and disables the
"Receive ATM Cell/PPP Processor Block" (for interrupt genera-
tion), then all "Receive ATM Cell/PPP Processor Block" inter-
rupts will be disabled for interrupt generation. If the user writes a
"1" to this register bit, he/she will still need to enable the individ-
ual "Receive ATM Cell/PPP Processor Block" interrupt(s) at the
"Source Level" in order to enable that particular interrupt.
0 - Disable all "Receive ATM Cell/PPP Processor Block" inter-
rupts within the device.
1 - Enables the "Receive ATM Cell/PPP Processor Block" at the
"Block-Level".
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