XRT79L71 Datasheet, PDF (377/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
TRANSMIT ATM CELL PROCESSOR BLOCK - TRANSMIT ATM CELL COUNTER - BYTE 2 (ADDRESS =
0X1F29)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit ATM Cell Count[23:16]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Transmit ATM Cell
Count[23:16]
TYPE
DESCRIPTION
RUR
Transmit ATM Cell Count - Byte 2[23:16]:
This RESET-upon-READ register, along with the "Transmit ATM Cell
Count - Bytes 3, 1 and 0" registers, contain a 32-bit value for the num-
ber of User/Valid cells that have been transmitted by the Transmit ATM
Cell Processor block.
NOTES:
1. The contents within these registers include all of the
following: All ATM cells that have been read out from the
TxFIFO, or the Transmit Cell Insertion Buffer.
2. The contents of these registers do not include the number of
Idle Cells that have been generated by the Transmit ATM Cell
Processor block.
3. If the number of Cells reaches the value "0xFFFFFFFF" then
these registers will saturate to and remain at this value (e.g.,
it will NOT overflow to "0x00000000").
TRANSMIT ATM CELL PROCESSOR BLOCK - TRANSMIT ATM CELL COUNTER - BYTE 1 (ADDRESS =
0X1F2A)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit ATM Cell Count[15:8]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Transmit ATM Cell
Count[15:8]
TYPE
DESCRIPTION
RUR
Transmit ATM Cell Count - Byte 1[15:8]:T
his RESET-upon-READ register, along with the "Transmit ATM Cell
Count - Bytes 3, 2 and 0" registers, contain a 32-bit value for the num-
ber of User/Valid cells that have been transmitted by the Transmit ATM
Cell Processor block.
NOTES:
1. The contents within these registers include all of the
following: All ATM cells that have been read out from the
TxFIFO, or the Transmit Cell Insertion Buffer.
2. The contents of these registers do not include the number of
Idle Cells that have been generated by the Transmit ATM Cell
Processor block.
3. If the number of Cells reaches the value "0xFFFFFFFF" then
these registers will saturate to and remain at this value (e.g.,
it will NOT overflow to "0x00000000").
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