XRT79L71 Datasheet, PDF (292/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L71
REV. P1.0.3
PRELIMINARY
áç
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
RECEIVE ATM CELL PROCESSOR BLOCK - RECEIVE ATM CELLS WITH CORRECTABLE HEC BYTE
ERROR COUNT REGISTER - BYTE 3 (ADDRESS = 0X1730)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Received Cells with Correctable HEC Byte Error Count[31:24]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Received Cells with Cor-
rectable HEC Byte Error
Count[31:24]
TYPE
RUR
DESCRIPTION
Received Cells with Correctable HEC Byte Error
Count[31:24]:
These RESET-upon-READ bit-fields, along with that within the
"Receive ATM Cell Processor Block - Receive Cells with Correct-
able HEC Byte Error Count - Bytes 2 through 0" registers contain
the 32-bit expression for the number of cells (containing "correct-
able" HEC byte errors) that have been received since the last
read of these registers.
This particular register byte contains the MSB (Most Significant
Byte) of this 32-bit value for the number of Received ATM cells
with Correctable HEC Byte Errors.
NOTE: If the number of cells with "Correctable HEC Byte Errors"
reaches the value "0xFFFFFFFF" then these registers
will saturate to and remain at this value (e.g., it will not
overflow to "0x00000000").
RECEIVE ATM CELL PROCESSOR BLOCK - RECEIVE ATM CELLS WITH CORRECTABLE HEC BYTE
ERROR COUNT REGISTER - BYTE 2 (ADDRESS = 0X1731)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Received Cells with Correctable HEC Byte Error Count[23:16]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Received Cells with Cor-
rectable HEC Byte Error
Count[23:16]
TYPE
RUR
DESCRIPTION
Received Cells with Correctable HEC Byte Error
Count[23:16]:
These RESET-upon-READ bit-fields, along with that within the
"Receive ATM Cell Processor Block - Receive Cells with Correct-
able HEC Byte Error Count - Bytes 3, 1 and 0" registers contain
the 32-bit expression for the number of cells (containing "correct-
able" HEC byte errors) that have been received since the last
read of these registers.
NOTE: If the number of cells with "Correctable HEC Byte Errors"
reaches the value "0xFFFFFFFF" then these registers
will saturate to and remain at this value (e.g., it will not
overflow to "0x00000000").
280