XRT79L71 Datasheet, PDF (55/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
FIGURE 7. SYNCHRONOUS MODE 3 - IBM POWERPC 403 INTERFACE TIMING (READ CYCLE)
pCLK
pCS_L
pRW_L
pA[14:0]
pD[7:0]
pWE_L
pOE_L
pRdy
Address
t10
Data
t11
t12
XRT79L71
REV. P1.0.3
NOTE: The value for "t0" through "t12" can be found in Table 5.
TABLE 5: TIMING INFORMATION FOR THE MICROPROCESSOR INTERFACE, WHEN CONFIGURED TO OPERATE IN THE
IBM POWER PC403 MODE
Test Conditions: TA = 25°C, VCC = 3.3V±5% and 2.5V±5%, unless otherwise specified.
TIMING
DESCRIPTION
MIN.
TYP.
MAX.
t0
pCS_L low to PCLK high
4
-
-
t1
pRW_L low to PCLK high
9
-
-
t2
Address setup time to PCLK high
4
-
-
t3
Address hold time from PCLK high
2
-
-
t4
Data setup time (WRITE cycle)
4
-
-
t5
Data hold time (WRITE cycle) from PCLK High
0
-
-
t6
pWE_L low to Clock high
4
-
-
t7
Clock high to pWE_L high from PCLK high
0
-
-
t8
Clock high to pRDY high
4.4
-
10.5
t9
Clock high to pRDY low
4.2
-
10.4
t10 Clock high to Data valid (READ cycle)
-
-
11
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