XRT79L71 Datasheet, PDF (365/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

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PRELIMINARY
1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
XRT79L71
REV. P1.0.3
BIT NUMBER
NAME
2
Transmit Cell Insertion
Memory Overflow Inter-
rupt Enable
1
Detection of HEC Byte
Error Interrupt Enable
0
Detection of Transmit
UTOPIA Parity Error
Interrupt Enable
TYPE
DESCRIPTION
R/W Transmit Cell Insertion Memory Overflow Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or dis-
able the "Transmit Cell Insertion Memory Overflow" Interrupt.
If the user enables this interrupt, then the Transmit ATM Cell Proces-
sor block will generate an interrupt any time an overflow event has
occurred in the "Transmit Cell Insertion Memory" buffer.
0 - Disables the Transmit Cell Insertion Memory Overflow Interrupt.
1 - Enables the Transmit Cell Insertion Memory Overflow Interrupt.
R/W Detection of HEC Byte Error Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or dis-
able the "Detection of HEC Byte Error Interrupt" within the Transmit
ATM Cell Processor Block.
If the user enables this interrupt, then the Transmit ATM Cell Proces-
sor block will generate an interrupt each time it receives an ATM cell
(from the TxFIFO) that contains a HEC Byte error.
0 - Disables the "Detection of HEC Byte Error" Interrupt.
1 - Enables the "Detection of HEC Byte Error" Interrupt
Detection of Transmit UTOPIA Parity Error Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or dis-
able the "Detection of Transmit UTOPIA Parity Error" Interrupt within
the Transmit ATM Cell Processor block.
If the user enables this interrupt, then the Transmit ATM Cell Proces-
sor block will generate an interrupt each time it receives an ATM cell
byte or 16-bit word (from the TxFIFO) that contains a parity error.
0 - Disables the "Detection of Transmit UTOPIA Parity Error" Inter-
rupt.
1 - Enables the "Detection of Transmit UTOPIA Parity Error" Inter-
rupt.
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