XRT79L71 Datasheet, PDF (220/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L71
REV. P1.0.3
PRELIMINARY
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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
TXE3 FAS ERROR MASK UPPER REGISTER - G.751 (INDIRECT ADDRESS =0XNE, 0X48; DIRECT
ADDRESS = 0X1148)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
TxFAS_Error_Mask_Upper[4:0]
R/O
R/O
R/O
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-5
Unused
4-0
TxFAS_Error_Mask_
Upper[4:0]
TYPE
R/O
R/W
DESCRIPTION
TxFAS Error Mask Upper[4:0]:
These READ/WRITE bit-fields permit the user to insert bit errors
into the upper five bits, within the FAS (Framing Alignment Sig-
nal), within the outbound E3 data stream.
The Frame Generator will perform an XOR operation with the
contents of these FAS bits, and this register. The results of this
calculation will be inserted into the upper 5 FAS bit positions
within the "outbound" E3 data stream. For each bit-field (within
this register) that is set to "1", the corresponding bit, within the
FAS will be in error.
NOTE: For normal operation, the user should set this register to
0x00.
TXE3 FAS ERROR MASK LOWER REGISTER - G.751 (INDIRECT ADDRESS =0XNE, 0X49; DIRECT
ADDRESS = 0X1149)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
TxFAS_Error_Mask_Lower[4:0]
R/O
R/O
R/O
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-5
Unused
4-0
TxFAS_Error_Mask_
Lower[4:0]
TYPE
R/O
R/W
DESCRIPTION
TxFAS Error Mask Lower[4:0]:
These READ/WRITE bit-fields permit the user to insert bit errors
into the lower five bits, within the FAS (Framing Alignment Sig-
nal), within the outbound E3 data stream.
The Frame Generator will perform an XOR operation with the
contents of these FAS bits, and this register. The results of this
calculation will be inserted into the lower 5 FAS bit positions
within the "outbound" E3 data stream. For each bit-field (within
this register) that is set to "1", the corresponding bit, within the
FAS will be in error.
NOTE: For normal operation, the user should set this register to
0x00.
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