XRT79L71 Datasheet, PDF (120/441 Pages) Exar Corporation – 1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC

XRT79L71
REV. P1.0.3
BIT
NUMBER
NAME
0
Receive Equalizer
Enable
PRELIMINARY
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1 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
TYPE
R/W
DEFAULT
VALUE
0
DESCRIPTION
Receive Equalizer Enable - XRT79L71:
This READ/WRITE register bit permits the user to either
enable or disable the Receive Equalizer block within the
Receive Section of XRT79L71, as listed below.
0 - Disables the Receive Equalizer within the corresponding
channel.
1 - Enables the Receive Equalizer within the corresponding
channel.
NOTE: For virtually all applications, we recommend that the
user set this bit-field to "1" and enable the Receive
Equalizer.
LIU CHANNEL CONTROL REGISTER (ADDRESS = 0X1306)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Unused
SFM
SFM
RLB
LLB
Clock Out
Enable
Enable
R/O
R/O
R/O
R/W
R/W
0
0
0
0
0
BIT 2
BIT 1
Unused
BIT 0
R/O
R/O
R/O
0
0
0
BIT
NUMBER
NAME
7
Unused
6
SFM Clock Out Enable
5
SFM Enable
4
RLB
TYPE
R/O
R/W
R/W
R/W
DEFAULT
VALUE
0
0
0
0
DESCRIPTION
Loop-Back Select - RLB Bit:
This READ/WRITE bit-field along with the corresponding
LLB bit-field permits the user to configure the XRT79L71
device into various loop-back modes.
The relationship between the settings for this input pin, the
corresponding LLB bit-field and the resulting Loop-back
Mode is presented below.
LLB
0
0
1
1
RLB
0
1
0
1
Loop-back M ode
Normal (No Loop-back) Mode
Remote Loop-back Mode
Analog Local Loop-back Mode
Digital Local Loop-back Mode
3
LLB
2 - 0 Unused
R/W
0
Loop-Back Select - LLB Bit-field:
Please see the description (above) for RLB.
R/O
0
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